Technical capabilities

Parameters Units Standard Advanced Development
Material & Stack up
Materials  Type CEM-1, CEM-3, FR4 (Tg: 135°C, 150°C, 170°C, 180°C),
Teflon, BT-Epoxy, Aluminium (IMS). Other material on request.
Max Panel Size Single Sided mm 900 x 600
(Max used area) Aluminium mm 590 x 440
Double Sided mm 605 x 505
Multilayer mm 580 x 500 600 x 500
Max Base Copper Thickness Outer Layer µm 105 400
Inner Layer µm 70 105
Max Board Thickness mm 3.2 4 5
Min Board Thickness mm 0.3 0.2 0.1
Min Inner Layer Thickness µm 100 75 50
Max Bow & Twist % According to IPC-600 G
Max Layer Count number 14 18 22
Min Board Thickness Tol. % 10 7.5 5
Width & Spacing (Depending on finished Cu)
Line width/space Outer Layer µm 100 80 80
Line width/space Inner Layer µm 100 80 70
Min annular ring Outer/Inner Layer µm 175 150 150
Min Clearance Hole to Cu µm 200 175 150
Plated Holes
Min Hole size drilled mm 0.2 0.15 0.1
Max Hole size drilled mm 6.5 6.5 6.5
Max Hole size routed mm No limits No limits No limits
Min Hole size plated mm 0.1 0.05 0.01
Hole Tolerance Standard +/- µm 100 100 100
Press-Fit +/- µm +90/-60 +90/-60 +90/-60
Hole Location Tolerance +/- µm 100 80
Max Aspect Ratio Through Holes for 1,6mm number 8/1 10/1 12/1
Max Aspect Ratio Blind Via number 0.8/1 1/1 1,1/1
Min Plating Thickness µm According to IPC-6012 B
Non Plated Holes
Min Hole size Drilled mm 0.2
Punched mm 0.8
Max Hole size Drilled mm 6.5
Routed mm No limits
Hole Tolerance Drilled +/- µm 100 50
Min Chamfer Depth Tol +/- % 10 8
Hole Location Tolerance +/- µm 100 80
Hole Depth Tolerance +/- µm 100 50
Routing, Scoring & Bevelling
Routing Diameter mm 0.5 – 3.0
Min Routing Tol +/- µm 100 75
Min Routing Clearance to Cu µm 200 150
Min Tol Depth Routing +/- % 10 8
Min Scoring Tol to Depth +/- µm 100 75
Min Scoring Tol to outline +/- µm 200
Min Scoring Clearance to Pattern µm 400 300
Bevelling Angle ° 30 & 45
Solder mask & Legend Print
Min Solder mask Clearance µm 80 50 40
Min Solder mask Dam µm 100 80  70
Min Legend Line Width µm 150 120  100
Legend Line Tol to Solder mask µm 150 120  100
Max via Hole Filled mm 0.6
Impedance Control
Impedance Control Tol +/- % 10 8
Track Width Tol +/- µm 30 20
Micro Via Layer Count
Sequent Build Up µVia build-up 1 + X + 1 2 + X + 2 3 + X + 3
Surface Finish
HASL PbSn Thickness µm 1 – 30
HASL Sn Thickness µm 1 – 30
OSP Thickness µm 0,2 – 0,5
Electroless Ni/Au (ENIG) Thickness µm 5 / 0,1(+/-0,05)
Electroless Ni/Pd/Au (ENEPIG) Thickness µm Ni 4-8 / Pd 0,1-0,3 / Au 0,03-0,08
Immersion Sn µm 0,3 – 0,6
Electrolytic Ni/Au Thickness µm 5 / 1,5
(Other Finishing on Request)
Special Treatment
Carbon Thickness µm 25 On demand
Carbon Min Width/Spacing µm 300
Carbon Min Overhang µm 100
Carbon Resistance Tol Laser Trimmed % 3 1
Peel-off mask Thickness µm 250
Max Coverage Hole size peel-off mm 3
Electrical Testing
Max Test area mm 600 x 620
Min embedded Resistance test 1
Max embedded Resistance test MΩ 50
Board Cleanliness
Max Ionic Contamination µg < 0,3
Flammabality
Flammabality rating See UL file: E75847 V-0